10.4230/OASICS.MEMICS.2010.47
Husar, Adam
Adam
Husar
Trmac, Miloslav
Miloslav
Trmac
Hranac, Jan
Jan
Hranac
Hruska, Tomas
Tomas
Hruska
Masarik, Karel
Karel
Masarik
Automatic C Compiler Generation from Architecture Description Language ISAC
Schloss Dagstuhl – Leibniz-Zentrum für Informatik
2011
Article
ISAC architecture
compiler generation
Matyska, Ludek
Ludek
Matyska
Kozubek, Michal
Michal
Kozubek
Vojnar, Tomáš
Tomáš
Vojnar
Zemcík, Pavel
Pavel
Zemcík
Antos, David
David
Antos
2011
2011-03-11
2011-03-11
2011-03-11
en
urn:nbn:de:0030-drops-30654
10.4230/OASIcs.MEMICS.2010
978-3-939897-22-4
2190-6807
10.4230/OASIcs.MEMICS.2010
OASIcs, Volume 16, MEMICS 2010
Sixth Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS'10) -- Selected Papers
2012
16
7
47
53
Schloss Dagstuhl – Leibniz-Zentrum für Informatik
Matyska, Ludek
Ludek
Matyska
Kozubek, Michal
Michal
Kozubek
Vojnar, Tomáš
Tomáš
Vojnar
Zemcík, Pavel
Pavel
Zemcík
Antos, David
David
Antos
2190-6807
Open Access Series in Informatics (OASIcs)
2011
16
Schloss Dagstuhl – Leibniz-Zentrum für Informatik
7 pages
340694 bytes
application/pdf
Creative Commons Attribution-NonCommercial-NoDerivs 3.0 Unported license
info:eu-repo/semantics/openAccess
This paper deals with retargetable compiler generation. After an introduction to application-specific instruction set processor design and a review of code generation in compiler backends, ISAC architecture description language is introduced. Automatic approach to instruction semantics extraction from ISAC models which result is usable for backend generation is presented.
This approach was successfully tested on three models of MIPS, ARM and TI MSP430 architectures. Further backend generation process that uses extracted instruction is semantics presented.
This process was currently tested on the MIPS architecture and some preliminary results are shown.
OASIcs, Vol. 16, Sixth Doctoral Workshop on Mathematical and Engineering Methods in Computer Science (MEMICS'10) -- Selected Papers, pages 47-53