10.4230/OASICS.WCET.2009.2280
Nenova, Stefana
Stefana
Nenova
Kästner, Daniel
Daniel
Kästner
Worst-Case Timing Estimation and Architecture Exploration in Early Design Phases
Schloss Dagstuhl – Leibniz-Zentrum für Informatik
2009
Article
WCET estimation
architecture exploration WCET estimation
architecture exploration
Holsti, Niklas
Niklas
Holsti
2009
2009-11-26
2009-11-26
2009-11-26
en
urn:nbn:de:0030-drops-22807
10.4230/OASIcs.WCET.2009
978-3-939897-14-9
2190-6807
10.4230/OASIcs.WCET.2009
OASIcs, Volume 10, WCET 2009
9th International Workshop on Worst-Case Execution Time Analysis (WCET'09)
2012
10
15
1
11
Schloss Dagstuhl – Leibniz-Zentrum für Informatik
Holsti, Niklas
Niklas
Holsti
2190-6807
Open Access Series in Informatics (OASIcs)
2009
10
Schloss Dagstuhl – Leibniz-Zentrum für Informatik
11 pages
200463 bytes
application/pdf
Creative Commons Attribution-NonCommercial-NoDerivs 3.0 Unported license
info:eu-repo/semantics/openAccess
Selecting the right computing hardware and configuration at the beginning of an industrial project is an important and highly risky task, which is usually done without much tool support, based on experience gathered from previous projects. We present TimingExplorer - a tool to assist in the exploration of alternative system configurations in early design phases. It is based on AbsInt’s aiT WCET Analyzer and provides a parameterizable core that represents a typical architecture of interest. TimingExplorer requires (representative) source code and enables its user to take an informed decision which processor configurations are best suited for his/her needs. A suite of TimingExplorers will facilitate the process of determining what processors to use and it will reduce the risk of timing problems becoming obvious only late in the development cycle and leading to a redesign of large parts of the system.
OASIcs, Vol. 10, 9th International Workshop on Worst-Case Execution Time Analysis (WCET'09), pages 1-11