10.4230/OASICS.WCET.2010.1
Gebhard, Gernot
Gernot
Gebhard
Timing Anomalies Reloaded
Schloss Dagstuhl – Leibniz-Zentrum für Informatik
2010
Article
Timing Anomalies
Domino Effects
MRU Replacement Policy
LEON2
Lisper, Björn
Björn
Lisper
2010
2010-11-26
2010-11-26
2010-11-26
en
urn:nbn:de:0030-drops-28201
10.4230/OASIcs.WCET.2010
978-3-939897-21-7
2190-6807
10.4230/OASIcs.WCET.2010
OASIcs, Volume 15, WCET 2010
10th International Workshop on Worst-Case Execution Time Analysis (WCET 2010)
2012
15
1
1
10
Schloss Dagstuhl – Leibniz-Zentrum für Informatik
Lisper, Björn
Björn
Lisper
2190-6807
Open Access Series in Informatics (OASIcs)
2010
15
Schloss Dagstuhl – Leibniz-Zentrum für Informatik
10 pages
305021 bytes
application/pdf
Creative Commons Attribution-NonCommercial-NoDerivs 3.0 Unported license
info:eu-repo/semantics/openAccess
Computing tight WCET bounds in the presence of timing anomalies - found in almost any modern hardware architecture - is a major challenge of timing analysis.
In this paper, we renew the discussion about timing anomalies, demonstrating that even simple hardware architectures are prone to timing anomalies. We furthermore complete the list of timing-anomalous cache replacement policies, proving that the most-recently-used replacement policy (MRU) also exhibits a domino effect.
OASIcs, Vol. 15, 10th International Workshop on Worst-Case Execution Time Analysis (WCET 2010), pages 1-10